The present invention relates to a logic analyzer for measuring a plurality of logic signals transmitted through a single digital bus in time-sharing manner.
It is becoming a common practice to incorporate microprocessors into digital electronic apparatus to provide intelligent functions. For developing, calibrating, and troubleshooting such electronic apparatus, powerful logic measurement instruments are necessary. One logic measurement instrument is a logic analyzer comprising a memory circuit for storing input logic signals, a word recognizer for recognizing a predetermined trigger word from the input logic signals, a display device for displaying the stored signals in the memory circuit and a controller. The logic analyzer is a very useful and versatile tool because it can measure multiple-bit logic data such as 4, 8, 16 or 32 bits of data and can measure the desired portion of the input data before and/or after the predetermined trigger word in the input data.
In some microprocessor systems, signal groups such as data and address signals are transmitted through a multiplexed digital bus in a time-sharing manner. Since conventional logic analyzers include one memory circuit for each input channel and each memory circuit receives the same clock pulse, the memory circuits store the data and address signals alternately. The display device displays the stored signals in the memory circuits in the order of the memory address, i.e., the data and address signals are displayed alternately. Hence, a confusing display results and an operator must mentally keep track of what is being observed.
Moreover, many communication systems use the time-sharing digital transmission systems. If the conventional logic analyzers are used for measuring these systems, there is the same problem described hereinbefore.